A processor mounted on, for example, a smart phone or a tablet PC, has at least one application processor (AP) and at least one low power DDR (LPDDR) vertically stacked. The processor may be configured such that packages are individually tested and only normal packages are stacked, thereby demonstrating a high assembling yield, which may be advantageous. In some cases, the processor may also be referred to as a system on chip (SOC).
In the conventional processor, a relatively thick printed circuit board (PCB) may be generally used as a substrate of an application processor, and a solder ball having a relatively large diameter may be generally used as an internal conductor. The processor has an overall thickness of approximately 1 mm or greater and a circuit pattern formed on the substrate of the processor has a width of approximately 10 μm or greater, resulting in a considerable loss of power.
In addition, since the PCB includes various kinds of organic materials, and there may be a big difference in the thermal expansion coefficient between each of the organic materials and an inorganic material, such as a semiconductor die or an encapsulant, the completed processor may warp.
In an example scenario, a high priced PCB may be purchased to manufacture a processor that is less susceptible to warpage. Such a solution, however, unacceptably increases the manufacturing cost of the processor.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present disclosure as set forth in the remainder of the present application with reference to the drawings.